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PD - 97105
IRFS4321PBF IRFSL4321PbF
Applications Motion Control Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l Hard Switched and High Frequency Circuits
l
HEXFET(R) Power MOSFET
Benefits l Low RDSON Reduces Losses l Low Gate Charge Improves the Switching Performance l Improved Diode Recovery Improves Switching & EMI Performance l 30V Gate Voltage Rating Improves Robustness l Fully Characterized Avalanche SOA
VDSS RDS(on) typ. max. ID
D
D
150V 12m: 15m: 83A c
D
G S
G
D
S G D
S
D2Pak TO-262 IRFS4321PBF IRFSL4321PbF
D S
G
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS (Thermally limited) TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current d Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy e Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case)
Max.
83 c 59 330 330 2.2 30 120 -55 to + 175 300
Units
A
W W/C V mJ C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case g Junction-to-Ambient g Typ. --- --- Max. 0.45* 40 Units C/W
* RJC (end of life) for D2Pak and TO-262 = 0.65C/W. This is the maximum measured value after 1000 temperature cycles from -55 to 150C and is accounted for by the physical wearout of the die attach medium.
Notes through are on page 2
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1
6/23/06
IRFS_SL4321PbF
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
150 --- --- 3.0 --- --- --- --- --- --- 150 12 --- --- --- --- --- 0.8 --- 15 5.0 20 1.0 100 -100 --- V
Conditions
VGS = 0V, ID = 250A
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) IDSS IGSS RG(int) Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
--- mV/C Reference to 25C, ID = 1mAd m VGS = 10V, ID = 33A f V A nA VDS = VGS, ID = 250A VDS = 150V, VGS = 0V VGS = 20V VGS = -20V
mA VDS = 150V, VGS = 0V, TJ = 125C
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units
130 --- --- --- --- --- --- --- --- --- --- --- 71 24 21 18 60 25 35 4460 390 82 --- 110 --- --- --- --- --- --- --- --- --- pF ns S nC ID = 50A VDS = 75V VGS = 10V f VDD = 75V ID = 50A RG = 2.5 VGS = 10V f VGS = 0V VDS = 25V = 1.0MHz
Conditions
VDS = 25V, ID = 50A
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- --- 89 300 6.5 83c 330 1.3 130 450 --- A A V ns nC A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 50A, VGS = 0V f ID = 50A VR = 128V, di/dt = 100A/s f
G S D
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.096mH RG = 25, IAS = 50A, VGS =10V. Part not recommended for use above this value.
Pulse width 400s; duty cycle 2%. R is measured at TJ approximately 90C
2
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IRFS_SL4321PbF
1000
TOP
1000
VGS 15V 10V 8.0V 7.0V 6.5V 6.0V 5.5V 5.0V TOP VGS 15V 10V 8.0V 7.0V 6.5V 6.0V 5.5V 5.0V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
5.0V
1
5.0V
0.1 0.1 1
60s PULSE WIDTH Tj = 25C
1 10 100 0.1 1
60s PULSE WIDTH Tj = 175C
10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1000
3.5
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance
ID = 50A
3.0
ID, Drain-to-Source Current()
VGS = 10V
100
2.5
TJ = 175C
10
(Normalized)
2.0
1
TJ = 25C VDS = 25V
1.5
1.0
60s PULSE WIDTH
0.1 3.0 4.0 5.0 6.0 7.0 8.0 9.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
7000 6000 5000 4000 3000 2000 1000 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
Fig 4. Normalized On-Resistance vs. Temperature
20
VGS, Gate-to-Source Voltage (V)
ID= 50A VDS = 120V VDS= 75V VDS= 30V
16
C, Capacitance (pF)
Ciss
12
Coss
8
4
Crss
0 1 10 100
0 0 20 40 60 80 100 120 QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS_SL4321PbF
1000
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS (on) 100sec 1msec
ISD , Reverse Drain Current (A)
100
TJ = 175C
10
100
10
10msec
1
TJ = 25C
1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10 DC
VGS = 0V
0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4
100
1000
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
90 80 70
ID , Drain Current (A)
V(BR)DSS , Drain-to-Source Breakdown Voltage
Fig 8. Maximum Safe Operating Area
190
LIMITED BY PACKAGE
180
60 50 40 30 20 10 0 25 50 75 100 125 150 175 TC , Case Temperature (C)
170
160
150
140 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
5.0
Fig 10. Drain-to-Source Breakdown Voltage
500
EAS, Single Pulse Avalanche Energy (mJ)
4.0
400
ID 13A 20A BOTTOM 50A
TOP
Energy (J)
3.0
300
2.0
200
1.0
100
0.0 0 20 40 60 80 100 120 140 160
0 25 50 75 100 125 150 175
VDS, Drain-to-Source Voltage (V)
Starting TJ, Junction Temperature (C)
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFS_SL4321PbF
1
Thermal Response ( Z thJC )
D = 0.50
0.1
0.20 0.10
J R1 R1 J 1 2 R2 R2 R3 R3 C 1 2 3 3
Ri (C/W)
(sec)
0.05
0.01
0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE )
Ci= i/Ri Ci= i/Ri
0.085239 0.000052 0.18817 0.00098 0.176912 0.008365
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 0.001 0.01 0.1
0.001 1E-006 1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse 0.01
Avalanche Current (A)
10
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse)
0.05 0.10
1
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C.
0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
120
EAR , Avalanche Energy (mJ)
100
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 50A
80
60
40
20
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
175
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (C)
PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFS_SL4321PbF
6.0
40
VGS(th), Gate threshold Voltage (V)
5.0
ID = 1.0A ID = 1.0mA ID = 250A
IRRM - (A)
30
4.0
20
3.0
10
2.0
IF = 33A VR = 128V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800 900 1000
1.0 -75 -50 -25 0 25 50 75 100 125 150 175
0
TJ , Temperature ( C )
dif / dt - (A / s)
Fig 16. Threshold Voltage Vs. Temperature
40
Fig. 17 - Typical Recovery Current vs. dif/dt
3200 2800
30
2400
20
QRR - (nC)
IF = 50A VR = 128V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800 900 1000
IRRM - (A)
2000 1600 1200 800 400 0 IF = 33A VR = 128V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800 900 1000
10
0
dif / dt - (A / s)
dif / dt - (A / s)
Fig. 18 - Typical Recovery Current vs. dif/dt
3200 2800 2400
Fig. 19 - Typical Stored Charge vs. dif/dt
QRR - (nC)
2000 1600 1200 800 400 0 IF = 50A VR = 128V TJ = 125C TJ = 25C 100 200 300 400 500 600 700 800 900 1000
dif / dt - (A / s)
6
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRFS_SL4321PbF
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
I AS
Fig 22a. Unclamped Inductive Test Circuit
LD VDS
Fig 22b. Unclamped Inductive Waveforms
+
VDD D.U.T VGS Pulse Width < 1s Duty Factor < 0.1%
90%
VDS
10%
VGS
td(on) tr td(off) tf
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id Vds Vgs
L
0
DUT 1K
VCC
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
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Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
7
IRFS_SL4321PbF
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE AS S EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
OR
INT ERNAT IONAL RECT IFIER LOGO AS SEMBLY LOT CODE PART NUMBER F530S DAT E CODE P = DES IGNAT ES LEAD - FREE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY SIT E CODE
8
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IRFS_SL4321PbF
TO-262 Package Outline (Dimensions are shown in millimeters (inches))
TO-262 Part Marking Infor
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" INTERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INTERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DAT E CODE P = DES IGNATES LEAD-FREE PRODUCT (OPT IONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S ITE CODE
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9
IRFS_SL4321PbF
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 6/06
10
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